Formal Verification for Practicing Engineers (FVPE)

This workshop aims to create a cohesive community interested in the application of formal verification techniques to increase reliability of software intensive systems, but in which pragmatic constraints such as usability or costs play a central role. We aim at bringing together researchers and practitioners to lower the adoption barrier of formal verification. We especially focus on the needs of main stream developers that do not (necessarily) work on highly safety critical systems but on more main stream systems that still need to be reliable.

Workshop Organizers
Daniel Ratiu (Siemens, Germany)
Bernhard Schaetz (fortiss, Germany)
Alan Wassyng (McMaster University, Canada)


Workshop sessions


Session Chair: Daniel Ratiu

  1. Keynote -  What Do You Have to Prove? by David Parnas, Middle Road Software
  2. Insights for Practicing Engineers from a Formal Verification Study of the Linux Kernel Suraj Kothari and Ahmed Tamrawi 


Session Chair: Alan Wassyng

  1. On-boarding new Static Analysers in a Build System Vincent Nimal 
  2. Formal Specification and Verification of Automotive Software in TCS  Ravi Metta
  3. A Formal Model for Stateful and Variant-rich Automotive Functions  Michael Käßmeyer, Peter Bazan, Markus Schurius and Reinhard German
  4. Towards Using Formal Verification for the Development of Software at Lower Criticality Levels Daniel Ratiu


  1. Panel / Planery session / Break-out session

Workshop Website : Formal Verification for Practicing Engineers (FVPE)